ADP-XC7354-PL
ADP-XC7354-PLFor Xilinx XC7318(-/A/Q), XC7336(-/A/Q), XC7354, XC9536 and XC9536XL in PLCC44.
There are multiple executables:
for ALL03 and XC7318(-/A/Q), XC7336(-/A/Q), XC7354 it is Axc7236.exe
for ALL03 and XC9536 it is Axc9500.exe
ALL03 does not support XC9500XL series.
for ALL07 and XC7318(-/A/Q), XC7336(-/A/Q), XC7354 it is Axc7236.exe
for ALL07 and XC9536 it is Axc9500.exe
for ALL07 and XC9536XL it is Axc95xl.exe
The RP1 on the schematic can be everything between 0R and 100R. I don't know what values
has been used on the original HiLo adapter, but based on Xilinx Programming Specification it have
to be 0R for XC7xxx series up to "soft GND" (pulldown) for XC9500XL series.
On my test adapter i have used 0R, that worked with all CPLDs.
Same as for "ADP-XC7336-Q" adapter: There seems to be bug in Axc9500.exe executable, one can not
burn "write secure" fuse on XC9536. In the Xilinx XC9500 Programming Specification one can read that :
If the user elects to use both Read and Write Secure, the Read Security addresses must be
programmed first, followed by the Write Security addresses. Do not power down between
programming of the Read and Write Secure addresses or between Program and Verify operations.
However the Axc9500.exe executable is allowing only "read secure" in Auto mode, but no "write secure".
When selected manually from "Security fuse blow", the "write secure" is not running "read secure" first (as described above),
but only doing the "write secure" which of course fails. Luckily "read secure" is the typical kind of security fuse that one need:
The device supports two types of security; one to protect the design from being copied (read secure),
and one to protect the device from being erased and/or reprogrammed (write secure).
谢谢分享皮底爱抚图纸。
也谢谢楼主给俺留着沙发。
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