添加AUDIO_DAC_ADC模块过程为:
reg signed [15:0] audio_outR;
wire signed [15:0] audio_outL;
wire signed [15:0] audio_inL, audio_inR;
AUDIO_DAC_ADC u2 (//Audio Side
.oAUD_BCK(AUD_BCLK),
.oAUD_DATA(AUD_DACDAT),
.oAUD_LRCK(AUD_DACLRCK),
.oAUD_inL(audio_inL),/audio left data from ADC
.oAUD_inR(audio_inR),//audio right data from ADC
.iAUD_ADCDAT(AUD_ADCDAT),
.iAUD_extL(audio_outL),//audio left data to DAC
iAUD_extR(audio_outR),//audio right data to DAC
//Control Signals
.iCLK_15_6(AUD_CTRL_CLK),
.iRST_N(1′b1));2.6 液晶显示控制