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标题: USB-FPGA Module 2.13 [打印本页]

作者: shangdawei 时间: 2014-11-26 09:42
标题: USB-FPGA Module 2.13
本帖最后由 shangdawei 于 2014-11-26 09:44 编辑

http://www.ztex.de/usb-fpga-2/usb-fpga-2.13.e.html

Features

USB 2.0 interface with Mini-USB connector (B-type)
Cypress CY7C68013A EZ-USB FX2 Microcontroller (100 pin version)
Four Xilinx Artix 7 FPGA variants: XC7A35T, XC7A50T, XC7A75T and XC7A100T, see Variants
External I/O connector (consisting in two female 2x32 pin headers with 2.54mm grid) provides:
- 100 General Purpose I/O's (GPIO) connected to FPGA
- JTAG signals
- Reset signal
- External power (4.5 V .. 16 V) input
- 3.3V output
- I/O voltage output or input, see External I/O connector
256 MByte DDR3 SDRAM:
- Up to 400 MHz clock frequency
- 16 Bit bus width
- Up to 1600 MByte/s data rate
- Usable with the Xilinx Memory Interface Generator (MIG), examples are included in the SDK
128 MBit on-board Flash memory
- Allows Bitstream loading from Flash to FPGA (up to 16.5 MByte/s)
- Accessible from EZ-USB FX2 and from FPGA, see the CPLD description
128 Kbit EEPROM memory (can be used to store the EZ-USB firmware)
2 Kbit MAC-EEPROM: contains a unique non erasable MAC-address and is used to store firmware settings
Fast FPGA configuration via USB using CPLD: up to 24 MByte/s
On-Board power supply:
- 3.3 V: 2000 mA
- 1.8 V: 1000 mA
- 1.5 V: 2000 mA
- 1.0 V; 4000 mA
XC7A50T, XC7A75T and XC7A100T variants: Heat sink for high performance / high speed applications, see Section heat sink
Optional:
- Battery to store a key for bitstream encryption
- On-board JTAG connector
Temperature range: 0-70°C

作者: shangdawei 时间: 2014-11-26 09:47

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