
ut std_logic;--SPI 发射时钟,上升沿有效LCD_SDIS
ut std_logic;--SPI 数据串行输出口SPI_MODES :in std_logic_vector(1 downto 0);--串口操作模式选择--"01"is 8bit trans mode--"10"is 16bit trans mode--"11"is 24bit trans modeSPI_WR :in std_logic; --启动串口发送信号DbINOUTS :in std_logic_vector(23 downto 0));--背发送数据的并行输入口--8bit mode use DbINOUTS(7 downto 0)--16bit mode use DbINOUTS(15 downto 0)--24bit mode use DbINOUTS(23 downto 0)end;architecture SPI_interface_behav of SPI_interface issignal Db8bIT_reg :std_logic_vector(7 downto 0); --8bit 数据移位寄存器signal Db16bIT_reg :std_logic_vector(15 downto 0);--16bit 数据移位寄存器signal Db24bIT_reg :std_logic_vector(23 downto 0);--24bit 数据移位寄存器signal counter4 :std_logic_vector(3 downto 0); --移位脉冲产生计数器signal counter4s :std_logic_vector(1 downto 0); --SPI 时钟生成计数器signal counter8 :std_logic_vector(4 downto 0); --8bit SPI 时钟控制计数器signal counter16 :std_logic_vector(5 downto 0); --16bit SPI 时钟控制计数器signal counter24 :std_logic_vector(5 downto 0); --24bit SPI 时钟控制计数器signal shift :std_logic;--移位时钟脉冲signal LCD_SCLSS :std_logic;--SPI 时钟采集信号signal LCD_SCLSSS :std_logic;--无相移的SPI 基准时钟signal LCD_SCLSS8 :std_logic;--8bit SPI 时钟信号signal LCD_SCLSS16 :std_logic;--16bit SPI 时钟信号signal LCD_SCLSS24 :std_logic;--24bit SPI 时钟信号signal LCD_SDIS_8bIT :std_logic;--8bit SPI 数据信号signal LCD_SDIS_16bIT :std_logic;--16bit SPI 数据信号signal LCD_SDIS_24bIT :std_logic;--24bit SPI 数据信号begin--串行数据输出选择模块u1:process(LCD_SDIS_8bIT,LCD_SDIS_16bIT,LCD_SDIS_24bIT,SPI_MODES)beginif SPI_MODES="01" then --选择8bit 串行数据输出LCD_SDIS0 thencounter80 thencounter160 thencounter24<=counter24-1;if (counter24="000000")or(counter24="000001")or(counter24="110011")or(counter24="000010")thenLCD_SCLSS24<='0';elseLCD_SCLSS24<=LCD_SCLSSS;end if;end if;end if;end process;--8bit 数据移位模块Db8bIT_U:process(shift,SPI_WR,DbINOUTS)beginif SPI_WR='1' thenDb8bIT_reg<=DbINOUTS(7 downto 0);elseif shift='1' and shift'event thenLCD_SDIS_8bIT<=Db8bIT_reg(0);Db8bIT_reg(6 downto 0)<=Db8bIT_reg(7 downto 1);end if;end if;end process;--16bit 数据移位模块Db16bIT_U:process(shift,SPI_WR,DbINOUTS)beginif SPI_WR='1' thenDb16bIT_reg(15 downto 0)<=DbINOUTS(15 downto 0);elseif shift='1' and shift'event thenLCD_SDIS_16bIT<=Db16bIT_reg(0);Db16bIT_reg(14 downto 0)<=Db16bIT_reg(15 downto 1);end if;end if;end process;--24bit 数据移位模块Db24bIT_U:process(shift,SPI_WR,DbINOUTS)beginif SPI_WR='1' thenDb24bIT_reg(23 downto 0)<=DbINOUTS(23 downto 0);elseif shift='1' and shift'event thenLCD_SDIS_24bIT<=Db24bIT_reg(0);Db24bIT_reg(22 downto 0)<=Db24bIT_reg(23 downto 1);end if;end if;end process;end;五、仿真波形图




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