Locked-sync sine generator covers three decades with low distortion

liyf

Abstract: This circuit synchronizes a sinewave output through three decades of frequency (20Hz to 20kHz) while maintaining low THD and constant amplitude.
A similar version of this article appeared in the September 18, 2009 issue of EDN magazine.

Analog applications such as testing, calibration, and general system operation often require a sine waveform of accurate amplitude and frequency, with low total harmonic distortion (THD). Some applications demand that the generator of such waveforms have the ability to accurately synchronize the output with an external timing signal. Simple sinewave generators can offer various degrees of this performance, but maintaining low THD with constant amplitude is a problem, particularly if the output and the synchronization signal must remain locked through an extended range of frequencies.

The circuit of Figure 1 can synchronize a sinewave output through three decades of frequency (20Hz to 20kHz) while maintaining low THD and constant amplitude (Table 1). The synchronizer IC (74HC4046) is a phase-locked loop (PLL) complete with VCO and phase/frequency detector. It has three internal phase detectors, but the one used here (number 2) has a frequency-capture range equal to that of the VCO frequency range (fMAX - fMIN).




Figure 1. This 3-IC sinewave generator covers three frequency decades, provides low distortion, and can be synched to an external signal.

The circuit's general-purpose binary frequency divider (the 74HC4060) is connected between the VCO output and the 74HC4046 feedback input (the phase/frequency comparator input), and set for a division ratio of 64. When the PLL is locked, therefore, the Q6 output of the 74HC4060 generates a square wave equal to 1/64th of the VCO output frequency. The components that determine the 74HC4046 center frequency (C1 and R1) are dimensioned so the VCO frequency can range from (20 × 64) to (20,000 × 64), from the minimum to the maximum level of the VCO's input-voltage range.

A switched-capacitor lowpass filter (MAX297), whose cut-off frequency (by design) equals 1/50th of the clock frequency applied to it, has for signal input the same square wave used for the PLL feedback, and its clock input is attached to the VCO output. because the clock and signal inputs always have a frequency ratio of 64, the input signal always falls within the filter bandpass. No input harmonics fall within this bandpass, because the ratio of FCLOCK to frequency is
        
            Frequency (Hz)[/td]
            THD (%)[/td]
            Amplitude (VRMS)[/td]
        [/tr]
        
            [td]20[/td]
            [td]2.775[/td]
            [td]1.470[/td]
        [/tr]
        
            [td]50[/td]
            [td]2.650[/td]
            [td]1.472[/td]
        [/tr]
        
            [td]100[/td]
            [td]2.525[/td]
            [td]1.472[/td]
        [/tr]
        
            [td]200[/td]
            [td]2.250[/td]
            [td]1.473[/td]
        [/tr]
        
            [td]500[/td]
            [td]1.002[/td]
            [td]1.473[/td]
        [/tr]
        
            [td]1000[/td]
            [td]0.186[/td]
            [td]1.473[/td]
        [/tr]
        
            [td]2000[/td]
            [td]0.260[/td]
            [td]1.472[/td]
        [/tr]
        
            [td]5000[/td]
            [td]0.330[/td]
            [td]1.473[/td]
        [/tr]
        
            [td]10000[/td]
            [td]0.405[/td]
            [td]1.473[/td]
        [/tr]
        
            [td]20000[/td]
            [td]0.022[/td]
            [td]1.472[/td]
        [/tr]
   
[/table]