ALL-03 Hardware I/O Configuration

liyf

                     ALL-03 Hardware I/O Configuration
                     *********************************


This document describes the I/O configuration of the ALL-03 device
programmer. This information would be of use in the development of
special purpose software for the ALL-03 (and possibly also for the
Expro-60/80).


1. I/O Control Concept:
----------------------


Some basic concepts need to be explained.  


The main control unit is on the adapter card (SAC-201).


There are two 8-bit I/O registers on the SAC-201 that are able to
control all I/O devices on the ALL-03 main module.


Register name    I/O address
------------------------------------
IDPORT           base address+0
DATAPORT         base address+2


The base address is the I/O address of the SAC-201 as defined by DIP
switches 1 and 2. These switches allow a choice of 16 possible base
addresses from 200h to 2f0h (default is 2e0).


Every device on the ALL-03 main module can be controlled by writing
its ID byte to the IDPORT and then reading from or writing to the
DATAPORT (the ID bytes of the various devices will be shown below).


                          TABLE 2
                          ********


Available control pins on test-socket:


1. VOPENID:        1, 5, 7, 9 to 32.


2. VHHENID:        9 to 32.


3. VCCENID:        40, 36, 34, 32, to 26, 9, 7, 5, 1.


4. VHHENCID:       32 to 28.


5. TTLID:          all 40 pins can be defined as inputs or outputs.


Note:  Devices that cannot use the previous pin definitions will
       require a special purpose external adapter.



Example: We wish to write the value 7fh to #1 D/A device (ID = e5h).


             Assembly Language
             -----------------


idport      equ      2e0h
dataport    equ      2e2h


            mov      ax,0e5h          ;id number setting
            mov      dx,idport
            out      dx,al
            jmp      $+2              ;device recovery time


            mov      ax,7fh           ;data writing
            mov      dx,dataport
            out      dx,al
            jmp      $+2              ;device recovery time


==============================================================
               C Language


#define       idport 0x02e0
#define       dataport 0x02e2


Outp (idport, 0xe5)        ;/* ID number setting */
Outp (dataport, 0x7f)      ;/* data writing */


==============================================================


2. ALL-03 Device ID Mapping and Definition:
------------------------------------------


The following describes each 8-bit device and its associated ID bytes:


  Power Source D/A Voltage Level Setting Device:
  ---------------------------------------------


  e5h :    #1 D/A named VOPID, full scale is 25.5 volt (400 ma),
           resolution is 0.1 volt, minimum voltage setting is 10.2
           volt


           Example: Writing 255 to device e5h will set the #1 D/A to
                    25.5 volt, writing 102 to e5h will set the D/A to
                    10.2 volt.


  e6h      #2 D/A named VHHID, full scale is 15.3 volt (400 ma)
           resolution is 0.06 volt, minimum voltage setting is 5.1
           volt


           Example: Writing 255 to device e6h will set the #2 D/A to
                    15.3 volt, writing 85 to e6h will set the D/A to
                    5.1 volt.


  e7h      #3 D/A named VCCID, full scale is 10.2 volt (1A)
           resolution is 0.04 volt, minimum voltage setting is 0 volt


           Example: Writing 255 to device e7h will set the #2 D/A to
                    10.2 volt, writing 0 to e7h will set the D/A to 0
                    volt.

The levels of each power source can be set by the above three D/A
devices. However, additional devices are required to apply these
voltages to the specified test-socket pins.


TTL Level I/O Device:
--------------------


  e0h           TTLID+0
  e1h           TTLID+1
  e2h           TTLID+2
  e3h           TTLID+3
  e4h           TTLID+4


Total 40 bits assigned to 40 pins on test-socket.
LSB of e0h is assigned to pin 1, and MSB of e4h is assigned to pin 40.
Each pin can be a TTL level input or output. Before inputting from the
desired pin, the user must output a high to that pin.


Example: After writing an ID byte (TTLID+i) to the IDPORT, one can
         then output 8 bits to the DATAPORT or input 8 bits from the
         DATAPORT.


VOP Level Output Control Device:
-------------------------------


  e8h           VOPENID+0
  e9h           VOPENID+1
  eah           VOPENID+2
  ebh           VOPENID+3
  ech           VOPENID+4


Total 40 bits assigned to 40 pins on test-socket.
LSB of e8h is assigned to pin 1, and MSB of ech is assigned to pin 40.


Writing a high to a particular bit will apply the VOP source to the
relevant test-socket pin. Writing a low will disable the VOP source
output to that pin.


Example: After writing ID byte VOPENID+1 to the IDPORT, and then
         outputting 8 bit data to the DATAPORT, VOP will be applied to
         the relevant test-socket pins 9 through 16 via a 22 ohm
         current limiting resistor.


Note:    1. Test-socket pins 2,3,4,6,8 and pins 33 to 40 have no VOP
            control circuit, so VOP cannot be output to these pins
            even though the relevant bit may have been set to high.


         2. VOP must not be applied to any pin for more than one hour.


VHH Level Output Control Device:
-------------------------------


  f0h           VHHENID+0
  f1h           VHHENID+1
  f2h           VHHENID+2
  f3h           VHHENID+3
  f4h           VHHENID+4


Total 40 bits assigned to 40 pins on test-socket.
LSB of f0h is assigned to pin 1, and MSB of f4h is assigned to pin 40.


Writing a high to a particular bit will apply the VHH source to the
relevant test-socket pin. Writing a low will disable the VHH source
output to that pin.


Example: After writing ID byte VHHENID+1 to the IDPORT, and then
         outputting 8 bit data to the DATAPORT, VHH will be applied to
         the relevant test-socket pins 9 through 16 via a 22 ohm
         current limiting resistor.


Note:    1. Test-socket pins 1 to 8 and pins 33 to 40 have no VHH
            control circuit, so VHH cannot be output to these pins
            even though the relevant bit may have been set to high.


         2. VHH must not be applied to any pin for more than one hour.


VCC Level Output Control:
------------------------


  edh           VHHENID+0
  eeh           VHHENID+1


Total 16 bits assigned to 16 pins on test-socket.


  edh b0 :  pin 40            eeh  b0 :  pin 27
      bl :  pin 36                 bl :  pin 26
      b2 :  pin 34                 b2 :  pin  9
      b3 :  pin 32                 b3 :  pin  7
      b4 :  pin 31                 b4 :  pin  5
      b5 :  pin 30                 b5 :  pin  1
      b6 :  pin 29                 b6 :  not used
      b7 :  pin 28                 b7 :  not used


Writing a high to a particular bit will apply the VCC source to the
relevant test-socket pin. Writing a low will disable the VCC source
output to that pin.


Example: After writing ID byte VCCENID+0 to the IDPORT, and then
         outputting 8 bit data to the DATAPORT, VCC will be directly
         applied to the relevant test-socket pins 28 through 40.


VHH Level Output to Extra Pins Control Device:
---------------------------------------------


The difference between these extra pins and the previously listed VHH
pins is that these extra pins have no 22 ohm current limiting resistor
in series with the VHH source. This is to permit some PAL VCC pins to
be driven at high voltage (over 12 volts) and high current.


  f5h           VHHENCID+0
  f6h           VHHENCID+1


Total 16  bits assigned to 16 pins on test-socket.


  f5h b0 :  not used         f6h : not used now
      bl :  not used
      b2 :  not used
      b3 :  pin 32
      b4 :  pin 31
      b5 :  pin 30
      b6 :  pin 29
      b7 :  pin 28


Writing a high to a particular bit will apply the VHH source to the
relevant test-socket pin. Writing a low will disable the VHH source
output to that pin.


Example: After writing ID byte VCCENCID+0 to the IDPORT, and then
         outputting 8 bit data to the DATAPORT, VHH will be directly
         applied to the relevant test-socket pins 28 through 32.


"Other Pins" Control Device:
---------------------------


Some additional pins not previously specified will be listed here.


  efh           OTHERENID


Total 8 bits assigned to 9 pins on test-socket


  efh  b0 :   low will set pin 20 to ground
              high will set pin 11, 30 to ground
         
       bl :   hi will output VOP (source - 2.4) volt to pin 7.
              low will disable output.


       b2 :   hi will output VOP (source - 2.4) volt to pin 25.
              low will disable output.


       b3 :   high will output oscillator TTL level to pins 2 and 3.
              Each pin is the inverse of the other.
              low will disable output.


       b4 :   high will output oscillator TTL level to pins 18 and 19.
              Each pin is the inverse of the other.
              low will disable output.


       b5 :   high will select 4.432 mhz oscillator
              low will select 2.216 mhz oscillator


       b6 :   not used


       b7 :   not used


Note: 1. All devices are reset to a low output at PC power on.


      2. Voltage drops exist between the power sources and the test
         socket pins. These voltage drop factors need to be included
         in the D/A power source level settings.


         These voltage drops are:


          VCC drop : 0.6 v, (= 15 steps)
          VHH drop : 0.6 v, (= 10 steps)
          VOP drop : 0.6 v, (=  6 steps)


      Example: The following code sets the #1 D/A to 21 volt:


          outp (IDPORT, VOPID)
          outp (DATAPORT, 210+6)


      3. Before inputting TTL levels, or outputting VOP, VHH, VCC
         voltages, the user must output a high to the specified pin.
         Otherwise, the relevant TTL input, or the specified supply
         voltage will be pulled down to ground. This will result in
         damage to the affected supply.


      4. In the version(?) we supply the source listing for
         TESTPRO.EXE. TESTPRO source is a good sample file for the
         user who wishes to develop his own software to program new
         devices.
配合下面的简图看

liyf

zjs423315 发表于 2019-4-5 21:45
看这个还的去学习英文？？？

国内是不会有什么这些相关的资料的，要想学到东西，不光要学英文呢